Embedded computing systems – such as those used in fighter aircraft, unmanned systems, and other military and aerospace platforms – face SWaP (Size, Weight, and Power) constraints that limit not only the physical hardware, but also the processing performance and cooling capacity required for high-bandwidth applications.
These constraints are forcing system architects to rethink how data moves through the system so CPUs can devote more cycles to real-time processing, not data transport. That’s where RoCE v2 comes in.
In SWaP-constrained environments, RoCE v2 offloads data movement from the CPU for higher throughput, lower latency, and more efficient use of limited processing resources.
Here’s how — and why it matters.
Embedded computing systems must fit into SWaP-constrained platforms, which means system architects typically rely on laptop CPUs — like Intel’s U-series or ARM Cortex cores — to handle data streams that rival enterprise systems.
For example, radar, infrared, and RF sensors can send up to 11 terabits of data per second. It’s the equivalent of asking a laptop processor to run a full data center in real-time. Without help, the CPU becomes overwhelmed — not because it can’t process the data, but because it’s spending too many cycles on data movement.
Traditional architectures rely on the CPU to move data, but as network speeds increase (and more data needs to be moved), that model breaks down. Even with 100G+ Ethernet, the CPU quickly becomes overloaded if it’s responsible for processing and routing every packet.
Adding more cores might seem like a solution, but it’s not practical in embedded environments, as SWaP constraints make it impossible. In embedded systems, processing efficiency matters more than raw power, and that means the CPU can’t waste cycles moving data.
Some systems use Data Plane Development Kit (DPDK) to eliminate bottlenecks. DPDK improves performance by bypassing the kernel and distributing data transfer across many CPU cores. However, DPDK still relies on the CPU to do all the work. That means more cores, more heat, and more power, making it an impractical solution in SWaP-constrained environments.
The tradeoff between DPDK vs. RoCE v2 becomes clear in this context: one leans on the CPU, the other offloads it entirely. While DPDK has value in certain high-performance systems, RoCE v2 is better suited for SWaP-limited designs.
RoCE v2 lessens the burden on CPUs in SWaP-constrained environments. Instead of relying on the CPU to move data, Network Interface Cards (NICs) — like NVIDIA’s ConnectX-7 — send data directly to memory, offloading this task from the CPU.
These offloads not only reduce CPU demand—they also improve RoCE v2 GPU performance by freeing up bandwidth and memory access for parallel processing tasks.
A good example of an embedded computing solution that can solve this problem is New Wave Design’s V1162 XMC mezzanine processor board, which incorporates the ConnectX-7 NIC, and thereby RoCE v2 offload capabilities.
New Wave Design also offers VPX modules like the V6062 and V6067, which feature Versal ACAPs and high-speed Ethernet offload. These platforms are well suited for RoCE v2 applications that demand low-latency data movement and strong GPU performance under SWaP constraints.
The result is high-throughput, low-latency, and near-zero CPU overhead that delivers significant benefits in SWaP-constrained environments:
Processing efficiency is crucial in SWaP-constrained environments. RoCE v2 enables system architects to design solutions that move massive volumes of data while preserving CPU cycles for mission-critical processing.
New Wave Design works closely with engineers to develop embedded solutions that prioritize these outcomes. From concept to deployment, our experience with RoCE v2 integration helps reduce bottlenecks and support next-generation performance.
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