What Are IP Cores and Why Do They Matter for FPGAs?

In the world of electronic design, an IP core, or “Intellectual Property core,” is a pre-designed, reusable block of logic. Think of them as the LEGO bricks of digital hardware design.

Instead of building every single component from scratch, which would be incredibly time-consuming, an FPGA engineer can use these ready-made and verified blocks of code to accelerate development of FPGA-based solutions.

IP cores can be as simple as an adder or a memory block, or as complex as a complete processor (like an ARM or RISC-V core) or communication interface (like PCIe or Fibre Channel). They’re a critical tool for increasing design productivity and reducing development costs, allowing engineers to focus on the unique aspects of their projects.

What Are the Different Types of IP Cores?

The type of IP core you choose can influence everything from performance to development cycles. One helpful way to understand the landscape is by looking at how much of the design is fixed versus adaptable.

Soft IP Cores:

Soft IP cores are provided as synthesizable hardware description language (HDL) code, such as Verilog or VHDL. They are the most flexible type of IP core because you can modify the code to suit your specific needs and synthesize them for any FPGA architecture. However, they may require more time for synthesis and place-and-route, and their performance can be less predictable. Common examples are the MicroBlaze soft processor core from AMD (formerly Xilinx) and the Fibre Channel Upper Layer Protocol (ULP) core from New Wave Design.

Firm IP Cores:

Firm IP cores are delivered as a gate-level netlist, which is a lower-level representation of the logic. They offer more security for the IP vendor and are more optimized than soft cores, but they are less flexible for customization. An example would be some of the memory interface cores provided by vendors like AMD or Intel.

Hard IP Cores:

Hard IP cores are physical blocks of silicon that are hard-wired into the FPGA chip itself. They are the most optimized for performance, power, and area, but they are completely inflexible and tied to a specific FPGA family or device. Examples include high-speed transceivers (for protocols like Ethernet and PCI Express), dedicated memory controllers, and hard processor systems (like the ARM cores in AMD’s Zynq and Versal families of FPGAs).

IP Cores + FPGA = Efficiency

Verified COTS IP cores save engineers time and reduce both scheduling and technical risk for major defense programs. New Wave Design offers a wide range of IP core solutions for use on various families of FPGAs, including UltraScale, UltraScale+, Versal, Stratix 10, SmartFusion2, and PolarFire, focused on high-speed serial interfaces in rugged embedded computing applications. Supported protocols include Serial Front Panel Data Port (sFPDP), IEEE 1394B, Serial Rapid IO (sRIO), High Speed Data Bus (HSDB), ARINC-818 and Fibre Channel (FC).